The ZL38005 is a hardware platform designed to support advanced acoustic echo canceller (with noise reduction) firmware applications available from Zarlink Semiconductor.

Features & Benefits

• Zarlink voice processor with Butterfly hardware accelerator and breakpoint/interrupt controller
• On-board Data (26 Kbytes), Instruction (24 Kbytes RAM and Boot (3 Kbytes) ROM
• Dual ΔΣ ADCs with input buffer gain selection programmable to 8 kHz sampling
• Dual ΔΣ DACs with output sampling of 8 kHz and internal output driver
• 2048 tap Filter co-processor shared across up to 16 separate functions in 128 tap increments
• Dual function Inter-IC Sound (I2S) or Secondary TDM port
• Primary PCM port supports TDM (ST BUS, GCI or McBSP framing) or SSI modes at bit rates of 128, 256, 512, 1024, 2048, 4096, 8192 or 16384 Kb/sec
• Separate slave (microcontroller) and master (Flash) SPI ports, maximum clock rate = 25 MHz
• Watchdog and 2 auxiliary timers
• 8 General Purpose Input/Output (GPIO) pins General purpose UART port
• Bootloadable for future Zarlink software upgrades
• External oscillator or crystal/ceramic resonator
• 1.2 V Core; 3.3 V IO with 5 V-tolerant inputs

Documentation

• zl38005-datasheet-sept2007.pdf

Software Manuals

• zls38501-firmware-manual-mar2007.pdf

Product Previews

• design-tools-product-preview-may2007.pdf
• zl38005-product-preview-mar2007.pdf

Downloads, Firmware and Drivers

BSDL Files:
• zl38005qc.bsd
• zl38005gg.bsd

IBIS Models:
• zl38005qcg1.ibs
• zl38005ggg2.ibs

Firmware:
• zls38501-firmware-jun2006.pdf

Typical Applications

• Zarlink voice processor with Butterfly hardware accelerator and breakpoint/interrupt controller
• On-board Data (26 Kbytes), Instruction (24 Kbytes RAM and Boot (3 Kbytes) ROM
• Dual ΔΣ ADCs with input buffer gain selection programmable to 8 kHz sampling
• Dual ΔΣ DACs with output sampling of 8 kHz and internal output driver
• 2048 tap Filter co-processor shared across up to 16 separate functions in 128 tap increments
• Dual function Inter-IC Sound (I2S) or Secondary TDM port
• Primary PCM port supports TDM (ST BUS, GCI or McBSP framing) or SSI modes at bit rates of 128, 256, 512, 1024, 2048, 4096, 8192 or 16384 Kb/sec
• Separate slave (microcontroller) and master (Flash) SPI ports, maximum clock rate = 25 MHz
• Watchdog and 2 auxiliary timers
• 8 General Purpose Input/Output (GPIO) pins General purpose UART port
• Bootloadable for future Zarlink software upgrades
• External oscillator or crystal/ceramic resonator
• 1.2 V Core; 3.3 V IO with 5 V-tolerant inputs

Product Packaging & Availability

Part Number	Package Type	Pin Count	Lead-Free Option	Shipping Option(s)	Lead Time(wks)	Status
ZL38005QCG1	LQFP	100	Pb-free-Matte Tin	Trays. Bake & Drypack	6-8 weeks	Production

Packaging Information

• Soldering Profiles
• Moisture Sensitivity
• Shelf Life
• Reliability Data

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